STC-006 — Reset the Test Timeline

Go to C.3.5 State and Time Control Requirements

The DIDO-TE SHALL reset the test timeline to the starting point specified by the governing Test Definition.

• [DTE1] U.S. Patent Application US20220237111A1, resetting a test timeline to its starting point for repeated testing
• [DTE3] Broad Agency Announcement White Paper, State and Time Control
• [DTE5] DIDO-TE Requirements Register, State and Time Control source requirements

Repeated Test Execution may require the same temporal starting conditions used by an earlier execution.

Timeline reset returns the test timeline to its specified starting point after the timeline has progressed.

The governing Test Definition specifies the starting point used for reset. STC-004 initially sets that starting point, while STC-006 restores the test timeline to that point for subsequent use.

Resetting the test timeline allows repeated Test Executions to use the same temporal reference even when the executions occur at different wall-clock times.

Timeline reset remains distinct from restoration of test state under STC-002. STC-002 restores the state conditions of the Test Environment. STC-006 restores the temporal position of the test timeline.

This requirement does not prescribe a clock service, simulation engine, checkpoint mechanism, operating-system clock, or other implementation mechanism.

• DIDO-TE
• Test Environment
• Test Definition
• Test Execution
• Configuration

Verification confirms that:

1. The governing Test Definition specifies the starting point used for timeline reset.
2. The test timeline can advance from its specified starting point.
3. The advanced test timeline can be reset to the specified starting point.
4. The reset starting-point value is distinguishable from the wall-clock time at which the reset occurs.
5. The reset is traceable to the governing Test Definition.
6. Timeline reset does not require a particular clock service, simulation engine, checkpoint mechanism, or operating-system clock.

Verification includes advancement of the test timeline away from its starting point, followed by reset, and confirms that the timeline returns to the specified starting point.

This requirement resets the test timeline to the starting point established under STC-004.

STC-002 separately restores test state. Together, state restoration and timeline reset support repeatable Test Execution without combining those independently verifiable obligations.

TBD

Draft

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