STC-005 — Control Test Timeline Rate

Go to C.3.5 State and Time Control Requirements

The DIDO-TE SHALL control the progression rate of the test timeline using the rate specified by the governing Test Definition.

• [DTE1] U.S. Patent Application US20220237111A1, virtual system time progressing at rates equal to, faster than, or slower than real time
• [DTE3] Broad Agency Announcement White Paper, State and Time Control
• [DTE5] DIDO-TE Requirements Register, State and Time Control source requirements

A test timeline may progress independently of wall-clock time.

The timeline rate determines how quickly test time progresses relative to elapsed wall-clock time.

The governing Test Definition specifies the required timeline rate. The DIDO-TE controls progression of the test timeline using that specified rate.

A test may require the timeline to progress at the same rate as real time, faster than real time, or slower than real time.

Controlling timeline rate allows time-dependent behavior to be exercised without requiring the duration of Test Execution to match the corresponding real-world duration.

Timeline-rate control remains distinct from establishing the timeline, setting its starting point, or resetting it. STC-003, STC-004, and STC-006 govern those separate obligations.

This requirement does not prescribe a clock implementation, simulation engine, scheduler, time service, or operating-system mechanism.

• DIDO-TE
• Test Environment
• Test Definition
• Test Execution
• Configuration

Verification confirms that:

1. The governing Test Definition specifies a progression rate for the test timeline.
2. The test timeline progresses using the specified rate.
3. A rate equal to real time can be distinguished from a rate faster than or slower than real time.
4. The configured timeline rate can be determined independently of wall-clock time.
5. The timeline rate is traceable to the governing Test Definition.
6. Timeline-rate control does not require a particular clock service, simulation engine, scheduler, or operating-system mechanism.

Verification includes a Test Definition specifying a timeline rate different from real time and confirms that the test timeline progresses at the specified rate.

This requirement controls the progression rate of the test timeline established under STC-003 and initialized under STC-004.

STC-006 separately resets the test timeline for repeated execution.

TBD

Draft

{{section>dido:03-dido-te:99-annexes:annex-c-requirements:03-functional-requirements:03-05-state-and-time-control-requirements:stc-005-control-test-timeline-rate#Statement&noheader&nofooter&noeditbtn}}